AbZip  1.0.0
aes_via_ace.h
1 /*
2 Copyright (c) 1998-2010, Brian Gladman, Worcester, UK. All rights reserved.
3 
4 The redistribution and use of this software (with or without changes)
5 is allowed without the payment of fees or royalties provided that:
6 
7  source code distributions include the above copyright notice, this
8  list of conditions and the following disclaimer;
9 
10  binary distributions include the above copyright notice, this list
11  of conditions and the following disclaimer in their documentation.
12 
13 This software is provided 'as is' with no explicit or implied warranties
14 in respect of its operation, including, but not limited to, correctness
15 and fitness for purpose.
16 ---------------------------------------------------------------------------
17 Issue Date: 20/12/2007
18 */
19 
20 #ifndef AES_VIA_ACE_H
21 #define AES_VIA_ACE_H
22 
23 #if defined( _MSC_VER )
24 # define INLINE __inline
25 #elif defined( __GNUC__ )
26 # define INLINE static inline
27 #else
28 # error VIA ACE requires Microsoft or GNU C
29 #endif
30 
31 #define NEH_GENERATE 1
32 #define NEH_LOAD 2
33 #define NEH_HYBRID 3
34 
35 #define MAX_READ_ATTEMPTS 1000
36 
37 /* VIA Nehemiah RNG and ACE Feature Mask Values */
38 
39 #define NEH_CPU_IS_VIA 0x00000001
40 #define NEH_CPU_READ 0x00000010
41 #define NEH_CPU_MASK 0x00000011
42 
43 #define NEH_RNG_PRESENT 0x00000004
44 #define NEH_RNG_ENABLED 0x00000008
45 #define NEH_ACE_PRESENT 0x00000040
46 #define NEH_ACE_ENABLED 0x00000080
47 #define NEH_RNG_FLAGS (NEH_RNG_PRESENT | NEH_RNG_ENABLED)
48 #define NEH_ACE_FLAGS (NEH_ACE_PRESENT | NEH_ACE_ENABLED)
49 #define NEH_FLAGS_MASK (NEH_RNG_FLAGS | NEH_ACE_FLAGS)
50 
51 /* VIA Nehemiah Advanced Cryptography Engine (ACE) Control Word Values */
52 
53 #define NEH_GEN_KEY 0x00000000 /* generate key schedule */
54 #define NEH_LOAD_KEY 0x00000080 /* load schedule from memory */
55 #define NEH_ENCRYPT 0x00000000 /* encryption */
56 #define NEH_DECRYPT 0x00000200 /* decryption */
57 #define NEH_KEY128 0x00000000+0x0a /* 128 bit key */
58 #define NEH_KEY192 0x00000400+0x0c /* 192 bit key */
59 #define NEH_KEY256 0x00000800+0x0e /* 256 bit key */
60 
61 #define NEH_ENC_GEN (NEH_ENCRYPT | NEH_GEN_KEY)
62 #define NEH_DEC_GEN (NEH_DECRYPT | NEH_GEN_KEY)
63 #define NEH_ENC_LOAD (NEH_ENCRYPT | NEH_LOAD_KEY)
64 #define NEH_DEC_LOAD (NEH_DECRYPT | NEH_LOAD_KEY)
65 
66 #define NEH_ENC_GEN_DATA {\
67  NEH_ENC_GEN | NEH_KEY128, 0, 0, 0,\
68  NEH_ENC_GEN | NEH_KEY192, 0, 0, 0,\
69  NEH_ENC_GEN | NEH_KEY256, 0, 0, 0 }
70 
71 #define NEH_ENC_LOAD_DATA {\
72  NEH_ENC_LOAD | NEH_KEY128, 0, 0, 0,\
73  NEH_ENC_LOAD | NEH_KEY192, 0, 0, 0,\
74  NEH_ENC_LOAD | NEH_KEY256, 0, 0, 0 }
75 
76 #define NEH_ENC_HYBRID_DATA {\
77  NEH_ENC_GEN | NEH_KEY128, 0, 0, 0,\
78  NEH_ENC_LOAD | NEH_KEY192, 0, 0, 0,\
79  NEH_ENC_LOAD | NEH_KEY256, 0, 0, 0 }
80 
81 #define NEH_DEC_GEN_DATA {\
82  NEH_DEC_GEN | NEH_KEY128, 0, 0, 0,\
83  NEH_DEC_GEN | NEH_KEY192, 0, 0, 0,\
84  NEH_DEC_GEN | NEH_KEY256, 0, 0, 0 }
85 
86 #define NEH_DEC_LOAD_DATA {\
87  NEH_DEC_LOAD | NEH_KEY128, 0, 0, 0,\
88  NEH_DEC_LOAD | NEH_KEY192, 0, 0, 0,\
89  NEH_DEC_LOAD | NEH_KEY256, 0, 0, 0 }
90 
91 #define NEH_DEC_HYBRID_DATA {\
92  NEH_DEC_GEN | NEH_KEY128, 0, 0, 0,\
93  NEH_DEC_LOAD | NEH_KEY192, 0, 0, 0,\
94  NEH_DEC_LOAD | NEH_KEY256, 0, 0, 0 }
95 
96 #define neh_enc_gen_key(x) ((x) == 128 ? (NEH_ENC_GEN | NEH_KEY128) : \
97  (x) == 192 ? (NEH_ENC_GEN | NEH_KEY192) : (NEH_ENC_GEN | NEH_KEY256))
98 
99 #define neh_enc_load_key(x) ((x) == 128 ? (NEH_ENC_LOAD | NEH_KEY128) : \
100  (x) == 192 ? (NEH_ENC_LOAD | NEH_KEY192) : (NEH_ENC_LOAD | NEH_KEY256))
101 
102 #define neh_enc_hybrid_key(x) ((x) == 128 ? (NEH_ENC_GEN | NEH_KEY128) : \
103  (x) == 192 ? (NEH_ENC_LOAD | NEH_KEY192) : (NEH_ENC_LOAD | NEH_KEY256))
104 
105 #define neh_dec_gen_key(x) ((x) == 128 ? (NEH_DEC_GEN | NEH_KEY128) : \
106  (x) == 192 ? (NEH_DEC_GEN | NEH_KEY192) : (NEH_DEC_GEN | NEH_KEY256))
107 
108 #define neh_dec_load_key(x) ((x) == 128 ? (NEH_DEC_LOAD | NEH_KEY128) : \
109  (x) == 192 ? (NEH_DEC_LOAD | NEH_KEY192) : (NEH_DEC_LOAD | NEH_KEY256))
110 
111 #define neh_dec_hybrid_key(x) ((x) == 128 ? (NEH_DEC_GEN | NEH_KEY128) : \
112  (x) == 192 ? (NEH_DEC_LOAD | NEH_KEY192) : (NEH_DEC_LOAD | NEH_KEY256))
113 
114 #if defined( _MSC_VER ) && ( _MSC_VER > 1200 )
115 #define aligned_auto(type, name, no, stride) __declspec(align(stride)) type name[no]
116 #else
117 #define aligned_auto(type, name, no, stride) \
118  unsigned char _##name[no * sizeof(type) + stride]; \
119  type *name = (type*)(16 * ((((unsigned long)(_##name)) + stride - 1) / stride))
120 #endif
121 
122 #if defined( _MSC_VER ) && ( _MSC_VER > 1200 )
123 #define aligned_array(type, name, no, stride) __declspec(align(stride)) type name[no]
124 #elif defined( __GNUC__ )
125 #define aligned_array(type, name, no, stride) type name[no] __attribute__ ((aligned(stride)))
126 #else
127 #define aligned_array(type, name, no, stride) type name[no]
128 #endif
129 
130 /* VIA ACE codeword */
131 
132 static unsigned char via_flags = 0;
133 
134 #if defined ( _MSC_VER ) && ( _MSC_VER > 800 )
135 
136 #define NEH_REKEY __asm pushfd __asm popfd
137 #define NEH_AES __asm _emit 0xf3 __asm _emit 0x0f __asm _emit 0xa7
138 #define NEH_ECB NEH_AES __asm _emit 0xc8
139 #define NEH_CBC NEH_AES __asm _emit 0xd0
140 #define NEH_CFB NEH_AES __asm _emit 0xe0
141 #define NEH_OFB NEH_AES __asm _emit 0xe8
142 #define NEH_RNG __asm _emit 0x0f __asm _emit 0xa7 __asm _emit 0xc0
143 
144 INLINE int has_cpuid(void)
145 { char ret_value;
146  __asm
147  { pushfd /* save EFLAGS register */
148  mov eax,[esp] /* copy it to eax */
149  mov edx,0x00200000 /* CPUID bit position */
150  xor eax,edx /* toggle the CPUID bit */
151  push eax /* attempt to set EFLAGS to */
152  popfd /* the new value */
153  pushfd /* get the new EFLAGS value */
154  pop eax /* into eax */
155  xor eax,[esp] /* xor with original value */
156  and eax,edx /* has CPUID bit changed? */
157  setne al /* set to 1 if we have been */
158  mov ret_value,al /* able to change it */
159  popfd /* restore original EFLAGS */
160  }
161  return (int)ret_value;
162 }
163 
164 INLINE int is_via_cpu(void)
165 { char ret_value;
166  __asm
167  { push ebx
168  xor eax,eax /* use CPUID to get vendor */
169  cpuid /* identity string */
170  xor eax,eax /* is it "CentaurHauls" ? */
171  sub ebx,0x746e6543 /* 'Cent' */
172  or eax,ebx
173  sub edx,0x48727561 /* 'aurH' */
174  or eax,edx
175  sub ecx,0x736c7561 /* 'auls' */
176  or eax,ecx
177  sete al /* set to 1 if it is VIA ID */
178  mov dl,NEH_CPU_READ /* mark CPU type as read */
179  or dl,al /* & store result in flags */
180  mov [via_flags],dl /* set VIA detected flag */
181  mov ret_value,al /* able to change it */
182  pop ebx
183  }
184  return (int)ret_value;
185 }
186 
187 INLINE int read_via_flags(void)
188 { char ret_value = 0;
189  __asm
190  { mov eax,0xC0000000 /* Centaur extended CPUID */
191  cpuid
192  mov edx,0xc0000001 /* >= 0xc0000001 if support */
193  cmp eax,edx /* for VIA extended feature */
194  jnae no_rng /* flags is available */
195  mov eax,edx /* read Centaur extended */
196  cpuid /* feature flags */
197  mov eax,NEH_FLAGS_MASK /* mask out and save */
198  and eax,edx /* the RNG and ACE flags */
199  or [via_flags],al /* present & enabled flags */
200  mov ret_value,al /* able to change it */
201 no_rng:
202  }
203  return (int)ret_value;
204 }
205 
206 INLINE unsigned int via_rng_in(void *buf)
207 { char ret_value = 0x1f;
208  __asm
209  { push edi
210  mov edi,buf /* input buffer address */
211  xor edx,edx /* try to fetch 8 bytes */
212  NEH_RNG /* do RNG read operation */
213  and ret_value,al /* count of bytes returned */
214  pop edi
215  }
216  return (int)ret_value;
217 }
218 
219 INLINE void via_ecb_op5(
220  const void *k, const void *c, const void *s, void *d, int l)
221 { __asm
222  { push ebx
223  NEH_REKEY
224  mov ebx, (k)
225  mov edx, (c)
226  mov esi, (s)
227  mov edi, (d)
228  mov ecx, (l)
229  NEH_ECB
230  pop ebx
231  }
232 }
233 
234 INLINE void via_cbc_op6(
235  const void *k, const void *c, const void *s, void *d, int l, void *v)
236 { __asm
237  { push ebx
238  NEH_REKEY
239  mov ebx, (k)
240  mov edx, (c)
241  mov esi, (s)
242  mov edi, (d)
243  mov ecx, (l)
244  mov eax, (v)
245  NEH_CBC
246  pop ebx
247  }
248 }
249 
250 INLINE void via_cbc_op7(
251  const void *k, const void *c, const void *s, void *d, int l, void *v, void *w)
252 { __asm
253  { push ebx
254  NEH_REKEY
255  mov ebx, (k)
256  mov edx, (c)
257  mov esi, (s)
258  mov edi, (d)
259  mov ecx, (l)
260  mov eax, (v)
261  NEH_CBC
262  mov esi, eax
263  mov edi, (w)
264  movsd
265  movsd
266  movsd
267  movsd
268  pop ebx
269  }
270 }
271 
272 INLINE void via_cfb_op6(
273  const void *k, const void *c, const void *s, void *d, int l, void *v)
274 { __asm
275  { push ebx
276  NEH_REKEY
277  mov ebx, (k)
278  mov edx, (c)
279  mov esi, (s)
280  mov edi, (d)
281  mov ecx, (l)
282  mov eax, (v)
283  NEH_CFB
284  pop ebx
285  }
286 }
287 
288 INLINE void via_cfb_op7(
289  const void *k, const void *c, const void *s, void *d, int l, void *v, void *w)
290 { __asm
291  { push ebx
292  NEH_REKEY
293  mov ebx, (k)
294  mov edx, (c)
295  mov esi, (s)
296  mov edi, (d)
297  mov ecx, (l)
298  mov eax, (v)
299  NEH_CFB
300  mov esi, eax
301  mov edi, (w)
302  movsd
303  movsd
304  movsd
305  movsd
306  pop ebx
307  }
308 }
309 
310 INLINE void via_ofb_op6(
311  const void *k, const void *c, const void *s, void *d, int l, void *v)
312 { __asm
313  { push ebx
314  NEH_REKEY
315  mov ebx, (k)
316  mov edx, (c)
317  mov esi, (s)
318  mov edi, (d)
319  mov ecx, (l)
320  mov eax, (v)
321  NEH_OFB
322  pop ebx
323  }
324 }
325 
326 #elif defined( __GNUC__ )
327 
328 #define NEH_REKEY asm("pushfl\n popfl\n\t")
329 #define NEH_ECB asm(".byte 0xf3, 0x0f, 0xa7, 0xc8\n\t")
330 #define NEH_CBC asm(".byte 0xf3, 0x0f, 0xa7, 0xd0\n\t")
331 #define NEH_CFB asm(".byte 0xf3, 0x0f, 0xa7, 0xe0\n\t")
332 #define NEH_OFB asm(".byte 0xf3, 0x0f, 0xa7, 0xe8\n\t")
333 #define NEH_RNG asm(".byte 0x0f, 0xa7, 0xc0\n\t");
334 
335 INLINE int has_cpuid(void)
336 { int val;
337  asm("pushfl\n\t");
338  asm("movl 0(%esp),%eax\n\t");
339  asm("xor $0x00200000,%eax\n\t");
340  asm("pushl %eax\n\t");
341  asm("popfl\n\t");
342  asm("pushfl\n\t");
343  asm("popl %eax\n\t");
344  asm("xorl 0(%esp),%edx\n\t");
345  asm("andl $0x00200000,%eax\n\t");
346  asm("movl %%eax,%0\n\t" : "=m" (val));
347  asm("popfl\n\t");
348  return val ? 1 : 0;
349 }
350 
351 INLINE int is_via_cpu(void)
352 { int val;
353  asm("pushl %ebx\n\t");
354  asm("xorl %eax,%eax\n\t");
355  asm("cpuid\n\t");
356  asm("xorl %eax,%eax\n\t");
357  asm("subl $0x746e6543,%ebx\n\t");
358  asm("orl %ebx,%eax\n\t");
359  asm("subl $0x48727561,%edx\n\t");
360  asm("orl %edx,%eax\n\t");
361  asm("subl $0x736c7561,%ecx\n\t");
362  asm("orl %ecx,%eax\n\t");
363  asm("movl %%eax,%0\n\t" : "=m" (val));
364  asm("popl %ebx\n\t");
365  val = (val ? 0 : 1);
366  via_flags = (val | NEH_CPU_READ);
367  return val;
368 }
369 
370 INLINE int read_via_flags(void)
371 { unsigned char val;
372  asm("movl $0xc0000000,%eax\n\t");
373  asm("cpuid\n\t");
374  asm("movl $0xc0000001,%edx\n\t");
375  asm("cmpl %edx,%eax\n\t");
376  asm("setae %al\n\t");
377  asm("movb %%al,%0\n\t" : "=m" (val));
378  if(!val) return 0;
379  asm("movl $0xc0000001,%eax\n\t");
380  asm("cpuid\n\t");
381  asm("movb %%dl,%0\n\t" : "=m" (val));
382  val &= NEH_FLAGS_MASK;
383  via_flags |= val;
384  return (int) val;
385 }
386 
387 INLINE int via_rng_in(void *buf)
388 { int val;
389  asm("pushl %edi\n\t");
390  asm("movl %0,%%edi\n\t" : : "m" (buf));
391  asm("xorl %edx,%edx\n\t");
392  NEH_RNG
393  asm("andl $0x0000001f,%eax\n\t");
394  asm("movl %%eax,%0\n\t" : "=m" (val));
395  asm("popl %edi\n\t");
396  return val;
397 }
398 
399 INLINE volatile void via_ecb_op5(
400  const void *k, const void *c, const void *s, void *d, int l)
401 {
402  asm("pushl %ebx\n\t");
403  NEH_REKEY;
404  asm("movl %0, %%ebx\n\t" : : "m" (k));
405  asm("movl %0, %%edx\n\t" : : "m" (c));
406  asm("movl %0, %%esi\n\t" : : "m" (s));
407  asm("movl %0, %%edi\n\t" : : "m" (d));
408  asm("movl %0, %%ecx\n\t" : : "m" (l));
409  NEH_ECB;
410  asm("popl %ebx\n\t");
411 }
412 
413 INLINE volatile void via_cbc_op6(
414  const void *k, const void *c, const void *s, void *d, int l, void *v)
415 {
416  asm("pushl %ebx\n\t");
417  NEH_REKEY;
418  asm("movl %0, %%ebx\n\t" : : "m" (k));
419  asm("movl %0, %%edx\n\t" : : "m" (c));
420  asm("movl %0, %%esi\n\t" : : "m" (s));
421  asm("movl %0, %%edi\n\t" : : "m" (d));
422  asm("movl %0, %%ecx\n\t" : : "m" (l));
423  asm("movl %0, %%eax\n\t" : : "m" (v));
424  NEH_CBC;
425  asm("popl %ebx\n\t");
426 }
427 
428 INLINE volatile void via_cbc_op7(
429  const void *k, const void *c, const void *s, void *d, int l, void *v, void *w)
430 {
431  asm("pushl %ebx\n\t");
432  NEH_REKEY;
433  asm("movl %0, %%ebx\n\t" : : "m" (k));
434  asm("movl %0, %%edx\n\t" : : "m" (c));
435  asm("movl %0, %%esi\n\t" : : "m" (s));
436  asm("movl %0, %%edi\n\t" : : "m" (d));
437  asm("movl %0, %%ecx\n\t" : : "m" (l));
438  asm("movl %0, %%eax\n\t" : : "m" (v));
439  NEH_CBC;
440  asm("movl %eax,%esi\n\t");
441  asm("movl %0, %%edi\n\t" : : "m" (w));
442  asm("movsl; movsl; movsl; movsl\n\t");
443  asm("popl %ebx\n\t");
444 }
445 
446 INLINE volatile void via_cfb_op6(
447  const void *k, const void *c, const void *s, void *d, int l, void *v)
448 {
449  asm("pushl %ebx\n\t");
450  NEH_REKEY;
451  asm("movl %0, %%ebx\n\t" : : "m" (k));
452  asm("movl %0, %%edx\n\t" : : "m" (c));
453  asm("movl %0, %%esi\n\t" : : "m" (s));
454  asm("movl %0, %%edi\n\t" : : "m" (d));
455  asm("movl %0, %%ecx\n\t" : : "m" (l));
456  asm("movl %0, %%eax\n\t" : : "m" (v));
457  NEH_CFB;
458  asm("popl %ebx\n\t");
459 }
460 
461 INLINE volatile void via_cfb_op7(
462  const void *k, const void *c, const void *s, void *d, int l, void *v, void *w)
463 {
464  asm("pushl %ebx\n\t");
465  NEH_REKEY;
466  asm("movl %0, %%ebx\n\t" : : "m" (k));
467  asm("movl %0, %%edx\n\t" : : "m" (c));
468  asm("movl %0, %%esi\n\t" : : "m" (s));
469  asm("movl %0, %%edi\n\t" : : "m" (d));
470  asm("movl %0, %%ecx\n\t" : : "m" (l));
471  asm("movl %0, %%eax\n\t" : : "m" (v));
472  NEH_CFB;
473  asm("movl %eax,%esi\n\t");
474  asm("movl %0, %%edi\n\t" : : "m" (w));
475  asm("movsl; movsl; movsl; movsl\n\t");
476  asm("popl %ebx\n\t");
477 }
478 
479 INLINE volatile void via_ofb_op6(
480  const void *k, const void *c, const void *s, void *d, int l, void *v)
481 {
482  asm("pushl %ebx\n\t");
483  NEH_REKEY;
484  asm("movl %0, %%ebx\n\t" : : "m" (k));
485  asm("movl %0, %%edx\n\t" : : "m" (c));
486  asm("movl %0, %%esi\n\t" : : "m" (s));
487  asm("movl %0, %%edi\n\t" : : "m" (d));
488  asm("movl %0, %%ecx\n\t" : : "m" (l));
489  asm("movl %0, %%eax\n\t" : : "m" (v));
490  NEH_OFB;
491  asm("popl %ebx\n\t");
492 }
493 
494 #else
495 #error VIA ACE is not available with this compiler
496 #endif
497 
498 INLINE int via_ace_test(void)
499 {
500  return has_cpuid() && is_via_cpu() && ((read_via_flags() & NEH_ACE_FLAGS) == NEH_ACE_FLAGS);
501 }
502 
503 #define VIA_ACE_AVAILABLE (((via_flags & NEH_ACE_FLAGS) == NEH_ACE_FLAGS) \
504  || (via_flags & NEH_CPU_READ) && (via_flags & NEH_CPU_IS_VIA) || via_ace_test())
505 
506 INLINE int via_rng_test(void)
507 {
508  return has_cpuid() && is_via_cpu() && ((read_via_flags() & NEH_RNG_FLAGS) == NEH_RNG_FLAGS);
509 }
510 
511 #define VIA_RNG_AVAILABLE (((via_flags & NEH_RNG_FLAGS) == NEH_RNG_FLAGS) \
512  || (via_flags & NEH_CPU_READ) && (via_flags & NEH_CPU_IS_VIA) || via_rng_test())
513 
514 INLINE int read_via_rng(void *buf, int count)
515 { int nbr, max_reads, lcnt = count;
516  unsigned char *p, *q;
517  aligned_auto(unsigned char, bp, 64, 16);
518 
519  if(!VIA_RNG_AVAILABLE)
520  return 0;
521 
522  do
523  {
524  max_reads = MAX_READ_ATTEMPTS;
525  do
526  nbr = via_rng_in(bp);
527  while
528  (nbr == 0 && --max_reads);
529 
530  lcnt -= nbr;
531  p = (unsigned char*)buf; q = bp;
532  while(nbr--)
533  *p++ = *q++;
534  }
535  while
536  (lcnt && max_reads);
537 
538  return count - lcnt;
539 }
540 
541 #endif